Across the week, participants engaged in a structured learning program that covered DC and temperature-insensitive references, supply sensitivity, bandgap references, and constant-gm bias techniques. Lectures were delivered by experts from MSU-IIT and industry, including Tekmark Industries, and were complemented by guided lab sessions using Cadence Virtuoso, a key platform in the IC design ecosystem.

A major feature of the program was a comprehensive design project on Day 4, where participants implemented a parallel bandgap voltage reference that met strict performance specifications across supply and temperature ranges. This exercise required applying concepts such as CTAT and PTAT compensation, startup circuitry, and sizing under layout constraints—preparing trainees for practical challenges in circuit design.

Throughout the labs, participants explored topics such as transistor behavior, reference circuit topologies, bias generation, and temperature compensation. They were tasked with building, simulating, and verifying circuit performance across different operating conditions, including process corners and mismatches.

The training concluded with participant reflections, awards for exemplary performance, and a closing message from Dean Hora. Recognition was given to individuals who stood out for technical skill, persistence, initiative, and learning attitude. Certificates were also awarded to all attendees.

This training reinforced MSU-IIT’s ongoing efforts to build a strong pipeline of skilled IC designers in the Philippines. It showcased the Institute’s capacity to host high-level technical programs and its commitment to contributing to national goals in microelectronics and semiconductor capability development.