Full Custom IC Design Layout Training

November 21 to 25, 2016

MSU-IIT Microlab Conducts 3rd in Series:
Full-Custom IC Design Layout Training for Faculty from Different Universities in Mindanao

It has been acknowledged that Filipino engineers are encouraged to establish companies that innovate in Integrated Circuit (IC) design which is an essential part of the Philippine electronic industries that focuses on semiconductor. With the support from the Philippine government, Philippine Institute of Integrated Circuits (PIIC) had been established by the Department of Science and Technology (DOST).

Philippine Institute of Integrated Circuits had been committed in promoting Microelectronics education in the country. They have aided universities and conducted trainings to different schools and universities around the Philippines. They supported last two training – Introduction to analog IC Design and Operational Amplifier IC Design.

To complete the training, the Microelectronics Laboratory of Mindanao State University – Iligan Institute of Technology (MSU-IIT) conducted a series of trainings to support advocacy of PIIC. With the assistance from the Electronics Engineers of the Philippines (IECEP) - Iligan Bay Chapter, the training is on its 3rd phase entitles Full-Custom IC Design Layout. This training was participated by faculties from different universities in Mindanao to experience IC Design and Layout.

The 5-day training was carried out at the Microelectronics Laboratory of the College of Engineering and Technology, MSU-IIT last November 21-25, 2016. It was joined and attended by the faculty members from University of Science and Technology of Southern Philippines – Cagayan de Oro City; Ateneo de Davao University, Holy Cross of Davao College, University of Immaculate Conception and University of Mindanao – Davao City; and Notre Dame of Midsayap College and Notre Dame University – Cotabato.

The first part of the training tackles about the Layout Considerations and Layout Design Rules which are very important since they need to follow such to avoid errors in verification. The second part of the training gave the faculty trainees with the basic understanding of the layout of different types of different components such as MOS transistor, resistor and capacitor.

After the discussions of the theories and concepts for layout of different components, a laboratory exercise follows to complement and highlight the significant points through actual layout design and simulation using Synopsys IC Design Tool. The course concluded by designing the Floorplan of a two stage Operational amplifier using the essential layout considerations they have learned from the previous discussions. With the enthusiasm and eagerness of the participants, overall, the 3rd training was a success.