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  • Home
  • About Us
  • News & Articles
  • People & Partners
    • Faculty Affiliates
    • Projects & Researchers
    • Graduate Students
    • Undergraduate Students
    • Alumni
    • Industry Partners
    • Funding Agencies & Insitutions
    • µC-IC Industry Partners
    • University Partners & Linkages
  • R&D
    • Funded Research
    • Graduate Theses
    • Undergraduate Theses
  • Research Publications
  • Trainings & Workshops
    • Fundamentals of Mixed Signal IC Design
    • Basic RTL Design with FPGA & Cadence Design Flow
    • Basic IC Design Virtual Training
    • Front-end and Back-end Full Custom Analog IC Design
    • Introduction to HDL with FPGA - Surigao Training
    • SoC Design Planning Integration
    • Cloud-based Synthesis using Design Compiler
    • Introduction to HDL with ASIC Flow and FPGA
    • Full-Custom IC Design Layout
    • Operational Amplifier IC Design
    • Introduction to Analog IC Design
    • FPGA—IC Design Verification
    • Synopsys Hercules & StarRC Training
  • Learning Hub
  • Contact Us
  • FAQ
  • Booking
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    • Home
    • About Us
    • News & Articles
    • People & Partners
      • Faculty Affiliates
      • Projects & Researchers
      • Graduate Students
      • Undergraduate Students
      • Alumni
      • Industry Partners
      • Funding Agencies & Insitutions
      • µC-IC Industry Partners
      • University Partners & Linkages
    • R&D
      • Funded Research
      • Graduate Theses
      • Undergraduate Theses
    • Research Publications
    • Trainings & Workshops
      • Fundamentals of Mixed Signal IC Design
      • Basic RTL Design with FPGA & Cadence Design Flow
      • Basic IC Design Virtual Training
      • Front-end and Back-end Full Custom Analog IC Design
      • Introduction to HDL with FPGA - Surigao Training
      • SoC Design Planning Integration
      • Cloud-based Synthesis using Design Compiler
      • Introduction to HDL with ASIC Flow and FPGA
      • Full-Custom IC Design Layout
      • Operational Amplifier IC Design
      • Introduction to Analog IC Design
      • FPGA—IC Design Verification
      • Synopsys Hercules & StarRC Training
    • Learning Hub
    • Contact Us
    • FAQ
    • Booking

CONTACT INFORMATION:

Address: 2/F  Room 209C,  College of Engineering, MSU-Iligan Institute of Technology, Andres Bonifacio Ave., Tibanga, Iligan City, 9200

Tel.:  (+63) 221 - 4050 local 4652
   (+63) 221 - 4050 local 4131

Email:  microlab@g.msuiit.edu.ph
 jefferson.hora@g.msuiit.edu.ph

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