Trainings and Extension Activities

  • Introduction to Analog IC Design

Date: July 27–August 1, 2015

Venue: Microlab, MSU-IIT

Course Lecturer:

Dr. Jefferson A. Hora, PECE

Dr. Olga Joy Labajo-Gerasta, PECE

•Assoc. Prof. Allenn C. Lowaton, MSEE

Engr. Jefrey C. Pasco

Topics:

  1. MOS transistor biasing and small-signal model

  2. Two-port network analysis

  3. Single stage amplifiers i.e. common-source, common-gate, common-drain

  4. Active loads, current sources and mirrors

  5. MOS capacitances

  6. Frequency response of single stage amplifiers

  7. Differential amplifiers, resistive load, active load and frequency response

  8. Fabrication process

Course Learning Outcomes:

1. Describe the regions of operation of a MOS transistor

2. Describe the conditions to bias a MOS transistor in a desired region

3. State and explain the factors affecting the drain current of a transistor

4. Describe the non-idealities and short-channel effects on the operation of the MOS transistor

5. Explain the importance of small-signal modelling of the transistor

6. Illustrate and describe mathematically the small-signal model of a transistor

7. Describe how the small-signal parameters vary with the operating region

8. Obtain the required size and bias of a transistor to achieve a target transconductance or output impedance

9. Describe the three basic single stage amplifier topologies i.e. common-source, common-gate, common-drain

10. Derive and simulate the equivalent two-port network parameters of single stage amplifiers

11. Obtain the size of single stage amplifiers to achieve required performance

12. State the advantages and disadvantages of using active loads compared with using resistive-loads for single stage amplifiers

13. Describe the bias conditions required for a transistor active load and current mirrors

14. Obtain the size of a transistor active load to achieve required amplifier performance

15. Describe the components of the parasitic capacitances in a MOS transistor

16. Describe the effects of MOS parasitic capacitances in single stage amplifiers frequency response

17. Derive the frequency response of single stage amplifiers

18. Describe how the frequency response is affected by the amplifier parameters

19. State the advantages of using differential signals over single-ended signals

20. Describe the differences between differential amplifiers with resistive loads and active loads

21. Obtain the size of transistors of a differential amplifier to achieve required performance

22. Describe and derive the frequency response of differential amplifiers.


University Participants— Faculty Trainees

  1. Agusan del Sur State College of Agriculture and Technology –Bunawan, Agusan del Sur

  2. Caraga State University–Butuan City

  3. Jose Rizal Memorial State University

  4. La Salle University–Ozamis

  5. Mindanao University of Science and Technology

  6. Notre Dame of Midsayap College

  7. Notre Dame University–Cotabato

  8. Xavier University

Click here for details: (report, photos)

CONTACT INFORMATION:


2/F Room 209C, College of Engineering and Technology, MSU-Iligan Institute of Technology,

Andres Bonifacio Ave., Tibanga, Iligan City, 9200, Philippines

T: (+63) 221 - 4050 loc. 4652 or (+63) 221 - 4050 local 4131





GRADUATE (BS/MS) ALUMNI SURVEY

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